Recently, an integration level in a semiconductor device has been becoming increasingly higher because of the remarkable progress in the semiconductor device technology, and with this progress, a demand for quality of a silicon wafer or the like has also been becoming more severe. As one of the important characteristics required to the silicon wafer as described above, there is an issue about surface configurations. This is because a higher integration level of a semiconductor device has brought about miniaturization of a device size, and for instance, slight undulation or the like on a silicon wafer may lead to faults in a device pattern during the photolithography step or other steps. In addition, in order to effectively use a wafer, there is required a wafer which has excellent high flatness up to the utmost outer peripheral portion (the very limit of the chamfered portion) of its main surface.
There have been conventionally used site flatness based on the front side reference, SFQR (Site Front Least Square Range) and others as the index for evaluating flatness of the wafer mentioned above. SFQR is a sum of absolute values of the respective maximum displacements in the plus side and minus side from the reference plane which is a flat plane in a site obtained by calculating data with the method of least squares, which is evaluated for each site. A size of the site is generally 20 mm square or 25 mm square.